MSP430 USCI Initialisierung

Ein Beispiel-Programm bzw. Beispiel-Initialsierung für USCI (Universial Serial Communication Interface) mit dem MSP430G2553 (im SPI-Mode). Das Programm an sich ist fast identisch mit dem Programm aus “MSP430 USI Initialisierung“. Es werden also wieder Bytes (0-255) an das Schieberegister gesendet.

Schaltplan

USCI_shift

C-Programm

  1. /*************************************************
  2.  *   ___       _             _
  3.  *  |   |_ _ _| |___ ___   _| |___
  4.  *  | | |_'_| . | -_|  _|_| . | -_|
  5.  *  |___|_,_|___|___|___|_|___|___|
  6.  *
  7.  * FILE:    main.c
  8.  * Author:  declis (xdec.de)
  9.  ************************************************/
  10.  
  11. #include <msp430g2553.h>
  12.  
  13. #define strobe  BIT0                    // strobe @ P1.0
  14. #define data    BIT7                    // data out @ P1.7
  15. #define clock   BIT5                    // CLK out @ P1.5
  16. #define ms      100
  17.  
  18. void main(void)
  19. {
  20.     unsigned char m_sec=ms;
  21.     WDTCTL=WDTPW+WDTHOLD;               // stop WDT
  22.     BCSCTL1=CALBC1_1MHZ;                // SMCLK=~1MHz
  23.     DCOCTL=CALDCO_1MHZ;
  24.  
  25.     P1DIR|=strobe;
  26.     P1OUT&=~strobe;
  27.     // USCI_B0 clock output, USCI_B0 SPI Mode: master out
  28.     P1SEL|=clock+data;
  29.     P1SEL2|=clock+data;
  30.  
  31.     // USCI in reset state
  32.     UCB0CTL1|=UCSWRST;
  33.     // SPI Master, 8bit data length, LSB first, synchronous mode
  34.     // data captured on first UCLK edge, changed on the following edge
  35.     UCB0CTL0|=UCMST+UCSYNC+UCCKPH;
  36.     // USCI CLK-SRC=SMCLK=~1MHz
  37.     UCB0CTL1|=UCSSEL_2;
  38.     // USCI released for operation
  39.     UCB0CTL1&=~UCSWRST;
  40.     // enable TX interrupt
  41.     IE2|=UCB0TXIE;
  42.     // clear TXIFG
  43.     IFG2&=~UCB0TXIFG;
  44.  
  45.     _EINT();                            // enable interrupts
  46.  
  47.     while(1)
  48.     {
  49.         while(IFG2&UCB0TXIFG);          // TX buffer ready?
  50.         UCB0TXBUF++;                    // increment TX buffer (0-255)
  51.         while(m_sec--)                  // wait some time (100ms)
  52.           __delay_cycles(1000);
  53.         m_sec=ms;
  54.     }
  55. }
  56.  
  57. #pragma INTERRUPT (USCI)
  58. #pragma vector=USCIAB0TX_VECTOR
  59. void USCI(void)
  60. {
  61.     // transmission done
  62.     P1OUT|=strobe;      // enable strobe register
  63.     P1OUT&=~strobe;
  64.     IFG2&=~UCB0TXIFG;   // clear TXIFG
  65. }
/*************************************************
 *	 ___       _             _
 *	|   |_ _ _| |___ ___   _| |___
 *	| | |_'_| . | -_|  _|_| . | -_|
 *	|___|_,_|___|___|___|_|___|___|
 *
 * FILE: 	main.c
 * Author: 	declis (xdec.de)
 ************************************************/

#include <msp430g2553.h>

#define strobe 	BIT0					// strobe @ P1.0
#define data	BIT7					// data out @ P1.7
#define clock	BIT5					// CLK out @ P1.5
#define ms		100

void main(void)
{
	unsigned char m_sec=ms;
	WDTCTL=WDTPW+WDTHOLD;				// stop WDT
	BCSCTL1=CALBC1_1MHZ;                // SMCLK=~1MHz
  	DCOCTL=CALDCO_1MHZ;

  	P1DIR|=strobe;
  	P1OUT&=~strobe;
  	// USCI_B0 clock output, USCI_B0 SPI Mode: master out
  	P1SEL|=clock+data;
  	P1SEL2|=clock+data;

  	// USCI in reset state
  	UCB0CTL1|=UCSWRST;
  	// SPI Master, 8bit data length, LSB first, synchronous mode
  	// data captured on first UCLK edge, changed on the following edge
  	UCB0CTL0|=UCMST+UCSYNC+UCCKPH;
  	// USCI CLK-SRC=SMCLK=~1MHz
  	UCB0CTL1|=UCSSEL_2;
  	// USCI released for operation
  	UCB0CTL1&=~UCSWRST;
  	// enable TX interrupt
  	IE2|=UCB0TXIE;
  	// clear TXIFG
  	IFG2&=~UCB0TXIFG;

  	_EINT();							// enable interrupts

  	while(1)
  	{
  		while(IFG2&UCB0TXIFG);			// TX buffer ready?
  		UCB0TXBUF++;					// increment TX buffer (0-255)
  		while(m_sec--)					// wait some time (100ms)
  		  __delay_cycles(1000);
  		m_sec=ms;
  	}
}

#pragma INTERRUPT (USCI)
#pragma vector=USCIAB0TX_VECTOR
void USCI(void)
{
	// transmission done
	P1OUT|=strobe;		// enable strobe register
	P1OUT&=~strobe;
	IFG2&=~UCB0TXIFG;	// clear TXIFG
}

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